Could you please clarify the officially supported and intended use cases for the OCuLink PCIe 3.0 x8 port on the new Cluster Box Control Board?
The documentation describes it as a PCIe 3.0 x8 upstream port, and there has been some community discussion about using an external computer as the PCIe Root Complex.
We would appreciate clarification on the following:
- Can the OCuLink port be connected to an external x86/AMD PC or server acting as PCIe Root Complex, allowing it to enumerate the ASM2824 and the Blade 3 PCIe endpoints?
- If yes, can the external host replace the MT7620A as the Root Complex, or is the MT7620A still involved in PCIe initialization/configuration?
- Is there any required jumper, firmware setting, DIP switch, device-tree change, reset sequence, or Control Board configuration to switch the ASM2824 upstream connection from the MT7620A to OCuLink?
- Can multiple Cluster Boxes be connected to one external PCIe Root Complex using separate PCIe/OCuLink ports?
- Can two Cluster Boxes be connected directly OCuLink-to-OCuLink, or is this impossible because both ports are upstream?
- What PCIe link configurations are officially supported through OCuLink: Gen3 x4 / Gen3 x8?
- Is the OCuLink port intended only for debugging/development, or is external Root Complex operation considered a supported use case?
- Are there any reference schematics, pinout documentation, example Linux configuration, drivers, or test procedures available for using this port?
Our use case is to build a PCIe network between four Blade 3 nodes and potentially connect two Cluster Boxes (8 Blade 3 nodes total) through external x86 hosts. We are developing an open-source Linux PCIe network driver for this purpose.
Thanks!